Some existing computing platforms have begun to be deployed with both a host processor and an embedded microcontroller, often having out-of-band communication capability. This embedded microcontroller typically operates independently of the host processor, and may have its own connection to the power supply and network interface devices. Some systems utilize an active management technology such as available from Intel Corporation (see for instance, Intel® AMT at URL www*intel*com/technology/platform-technology/intel-amt/ where periods are replaced with asterisks in this document to avoid inadvertent hyperlinks). Some AMT deployments utilize what is known as a management engine (ME). A user guide for the ME implemented for Intel® vPro™ deployments may be found at communities*intel*com/docs/DOC-1550.
While the documents cited above are directed toward specific implementations of an ME environment, it should be understood that ME is used herein to refer to a generic implementation not tied to a specific platform or architecture. A management engine or service processor is an isolated and protected computing resource. It provides information technology management features independent of any installed operating system, including allowing improved management of corporate assets and a standardized corporate assets management technology. It includes firmware that provides management features for clients. It also allows system administrators to remotely manage a platform that has the management engine on it.
The ME microcontroller may have its own ROM and cache memory. However, memory directly coupled to the ME may be SRAM (static RAM), which is slower than the host DRAM, and also limited in size. The ME may also use firmware in a protected area of system flash memory which is sequestered from the host operating system (OS).
The ME or Management Engine is now being utilized on server systems to support technologies surrounding power management; system availability; reliability, availability and serviceability (RAS); error logging; core clock initialization; etc. Without a functional ME the system will typically not boot or operate correctly. Because the ME is being adopted as a “basic needs” component for some platforms for “efficient performance” and “mission critical” needs, for instance, the Intel® Xeon® processor, the ME presents a potential stability issue for some server platforms. To accomplish the ME feature set on client systems, the embedded microprocessor may use a portion of host DRAM memory which is carved out of by BIOS during the POST (Power On Self Test) process. This memory sharing architecture is called UMA (Unified Memory Architecture). A problem exists in that the ME UMA memory represents a single point of failure that is not acceptable on high availability servers. If an uncorrectable error occurs within the UMA range, these existing systems will fail.